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| G4 MDD Bus Overclock (200MHz?) |
Posted by: willmurray461 on 2025-04-21 09:18:59
Has anyone tried overclocking the bus on the MDD beyond 167MHz (e.g. 200MHz)? I know the bus on low-end 133MHz MDD boards can be changed to 167MHz by removing R676. Can it be modified further by messing with the adjacent R677, R678, etc? |
Posted by: willmurray461 on 2025-09-12 21:20:40
I did some more investigating and found the datasheet for the clock gen IC (CY28506OC) on the MDD. According to it, the IC does not support frequencies over 167MHz. As such, 200MHz on the MDD would likely require swapping out the clock gen IC for something else, which would likely require a custom PCB to adapt the new chip, unless a drop-in replacement that supports 200MHz exists. |
Posted by: Coloruser on 2025-09-13 02:29:28
I guess, changing the clock chip will not get you to 200Mhz. The U2 memory and pci controller also needs to be configured to run an fsb above 167mhz. I am not sure whether this apple specific ASIC is able to do so. http://www.applerepairmanuals.com/the_manuals_are_in_here/Developer_Notes/PowerMac_G4.pdf |
Posted by: willmurray461 on 2025-09-13 15:24:02
Yeah I think the only way to know would be to look at the schematics for the MDD. Some of the schematics for other G4 computers have resistor configurations for unused higher bus speeds. Unfortunately, it doesn't look like anyone has leaked the MDD schematics yet.
Though it may be wishful thinking, I wouldn't be surprised if the IC supported a 200MHz bus, since by then the 7457/7447 (which supported a 200MHz FSB) were just around the corner, along with DDR PC3200 featuring 200MHz support as well. |
Posted by: Coloruser on 2025-09-13 15:39:22
Even though Apple introduced DDR Ram with the MDD and the corresponding PowerBook (that used a different PCI/Memory controller), the Max Bus between G4 and Bridge was only SDR. Thus only DMA transfers from I/O to Ram benefit from the DDR Ram, the CPU to Memory path did not. |
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