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Macintosh IIcx jumpers at W3
Posted by: croissantking on 2025-01-07 11:48:04 I've just acquired a IIcx logic board and have been looking it over. There is a jumper labelled W1, which I understand is for selecting a ROM SIMM vs the onboard ROM, just like the IIsi and IIci. There is also a pair of jumpers labelled W3. Anyone know what they do?
Posted by: finkmac on 2025-01-07 12:07:36 this intrigued me lol. i checked the bomarc schematics then i looked at the 030 datasheet
Posted by: zigzagjoe on 2025-01-07 12:08:20 I've just acquired a IIcx logic board and have been looking it over. There is a jumper labelled W1, which I understand is for selecting a ROM SIMM vs the onboard ROM, just like the IIsi and IIci. View attachment 82010 There is also a pair of jumpers labelled W3. Anyone know what they do? View attachment 82011 They disconnect /BR and /BG. There's some note in apple documents as it being part of the burn-in testing and to never remove in operation. Had the same question myself.
Posted by: croissantking on 2025-01-07 14:16:06 Ah, that’s … bizarre!
Posted by: dougg3 on 2025-01-07 20:01:57 Interesting! Here's the Apple TIL article about it. Doesn't add any new knowledge, but thought I'd link it for completeness!
Posted by: croissantking on 2025-01-07 21:01:31 Thank you for linking the article, @dougg3 There’s also W2, unpopulated…
Posted by: dougg3 on 2025-01-07 22:51:46 There’s also W2, unpopulated… Ah, interesting! I was too blind to find it myself in the Bomarc schematics. The AI assistant in Adobe Reader was completely useless, too: So instead, I used @max1zzz's IIcx reloaded board file to trace out where they go, and sure enough, there it is in the Bomarc schematics. It's hooked up to pins 5, 6, and 7 of UH6 (VIA2). These pins are also known as PA3, PA4, and PA5 of VIA2 and also go to pins on the GLU chip. Luckily, Guide to the Macintosh Family Hardware 2nd edition tells us what they are. They are interrupt request lines for expansion slots $C, $D, and $E. And more useful info from the same book... So after all that, I can say that it looks like they are the IRQ lines for the three other NuBus slots that aren't available on the IIcx, since the NuBus slots it actually has are $9, $A, and $B.
Posted by: croissantking on 2025-01-08 07:13:19 Ah, interesting! I was too blind to find it myself in the Bomarc schematics. The AI assistant in Adobe Reader was completely useless, too: View attachment 82031 Hahaha. That’s hilarious. I guess AI isn’t quite ready to take over the world, yet… So instead, I used @max1zzz's IIcx reloaded board file to trace out where they go, and sure enough, there it is in the Bomarc schematics. It's hooked up to pins 5, 6, and 7 of UH6 (VIA2). View attachment 82030 These pins are also known as PA3, PA4, and PA5 of VIA2 and also go to pins on the GLU chip. Luckily, Guide to the Macintosh Family Hardware 2nd edition tells us what they are. They are interrupt request lines for expansion slots $C, $D, and $E. View attachment 82032 And more useful info from the same book... View attachment 82033 So after all that, I can say that it looks like they are the IRQ lines for the three other NuBus slots that aren't available on the IIcx, since the NuBus slots it actually has are $9, $A, and $B. So sort of something vestigial, when they developed the IIcx board as a cut down design of the IIx?
Posted by: dougg3 on 2025-01-08 21:18:35 So sort of something vestigial, when they developed the IIcx board as a cut down design of the IIx? I think that's a good way to put it! I wonder if you could use that header in conjunction with one of the actual NuBus slots to make a crazy frankenstein NuBus card that brings out the extra NuBus slots somehow (externally to another enclosure or something?). It looks like the only thing unique between the different slots is that IRQ line as well as whether certain pins are floating or grounded, which must be how the card knows which slot it's in. Maybe it would be bad for the integrity of the signals, though. I dunno. Based on the Bomarc schematics, I'm assuming that on the IIci, unpopulated J15 (near W1) is the same concept.
Posted by: zigzagjoe on 2025-01-09 06:59:23 Those IRQ lines are interesting. I was debating making a CPU-socket 30Video card for my personal use on an IIcx board I have, but the lack of IRQ requires resorting to shenanigans like triggering it off a timer or hijacking the IRQ signals as SE cards must do. With those IRQ lines you could make PDS-type IO cards for the IIcx also, but due to the nubus slots using the addresses usually used by PDS you'd still need nonstandard decoding.
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