68kMLA Classic Interface

The Radius NuBus riser has been reversed. It consists of 3 GALs and a bunch of 74LS Chips. JEDEC for the GALs are here :

Radius Macintosh IIsi Nubus Adapter - PLD Archive

module GAL20V8A_U12 (
    // unused    nc1
    input    i2,
    input    i3,
    input    i4,
    input    i5,
    input    i6,
    input    i7,
    input    i8,
    input    i9,
    input    i10,
    input    i11,
    input    i13_n,
    input    i14,
    output    o15,
    output    o16,
    output    o17,
    output    o18,
    output    o19,
    (* NOREDUCE = "TRUE" *) inout    f20,
    (* NOREDUCE = "TRUE" *) inout    f21,
    output    o22,
    input    i23
);
    assign o22    = ((i2 | i3 | (~i4) | i13_n) & ((~i2) | (~i3) | (~i4) | i5 | i13_n) & ((~i2) | i3 | (~i4) | (~i5) | i13_n));
    assign f21    = ((~i11)) ? ((i2 | i3 | i4 | i5 | i6 | i7 | i9) & (i2 | (~i3) | i6 | i7 | i9) & ((~i2) | i3 | i5 | i6 | i7 | i9) & (i2 | i3 | i23 | i4 | i5 | i6 | (~i9) | (~i14)) & (i2 | (~i3) | i23 | i6 | (~i9) | (~i14)) & ((~i2) | i3 | i23 | i5 | i6 | (~i9) | (~i14)) & (f21 | i8)) : 'bZ;
    assign f20    = ((~i11)) ? ((i6 | i7 | i9) & (i23 | i6 | (~i9) | (~i14)) & (f20 | i8)) : 'bZ;
    assign o19    = ((i2 | i3 | i4) & (i2 | (~i3) | i4) & ((~i2) | i3 | i4) & ((~i2) | (~i3) | i4 | i5));
    assign o18    = ((i2 | (~i3) | i5) & (i2 | i3 | i4 | i5));
    assign o17    = ((~i7)) ? i9 : 'bZ;
    assign o16    = ((~i7)) ? (((~i2) & (~i3) & (~i5)) | (i2 & (~i3) & (~i5)) | (i2 & i3 & i4 & (~i5)) | (i2 & (~i3) & (~i4) & (~i5)) | (i2 & i3 & (~i4) & (~i5))) : 'bZ;
    assign o15    = (((~i7) | i14) & ((~i10) | i13_n));
endmodule // GAL20V8A_U12

module GAL20V8A_U13 (
    input    CLK,
    input    i2,
    input    i3,
    input    i4,
    input    i5,
    input    i6,
    input    i7,
    input    i8,
    input    i9,
    input    i10,
    input    i11,
    input    OE_n,
    input    i14,
    input    i15,
    (* NOREDUCE = "TRUE" *) inout    f16,
    // unused    o17,
    output    o18,
    (* NOREDUCE = "TRUE" *) inout    rf19,
    // unused    o20,
    (* NOREDUCE = "TRUE" *) inout    rf21,
    inout    f22,
    input    i23
);
reg rf19_reg = 'b0;
reg rf21_reg = 'b0;
    assign f22    = ((~i23) | (~i15) | (~i14));
always @(posedge clk) begin
    rf21_reg    <= (((~rf21) | rf19) & (rf21 | (~i11)));
end
    assign rf21 = (~(OE_n)) ? rf21_reg : 'bZ;
//    o20 OE signal is grounded
always @(posedge clk) begin
    rf19_reg    <= ((i2 | i3 | (~f22) | (~i4) | (~rf21) | i5 | (~i6) | (~rf19) | (~i7) | (~i8) | (~i9) | (~i10)) & (i2 | (~rf21) | (~rf19) | i7 | (~i8) | i9 | (~i10)));
end
    assign rf19 = (~(OE_n)) ? rf19_reg : 'bZ;
    assign o18    = rf19;
//    o17 OE signal is grounded
    assign f16    = (rf19 & (i2 | f16));
//    i15 OE signal is grounded
endmodule // GAL20V8A_U13

module GAL16V8A_U14 (
    input    CLK,
    input    i2,
    input    i3,
    input    i4,
    input    i5,
    input    i6,
    input    i7,
    input    i8,
    input    i9,
    input    OE_n,
    (* NOREDUCE = "TRUE" *) inout    rf12,
    inout    f13,
    output    o14,
    (* NOREDUCE = "TRUE" *) inout    f15,
    (* NOREDUCE = "TRUE" *) inout    f16,
    output    o17,
    output    o18,
    inout    f19
);
reg rf12_reg = 'b0;
    assign f19    = (rf12 | i6);
    assign o18    = ((~i2)) ? (~'b0) : 'bZ;
    assign o17    = (((~i2) | f15) & (f16 | (~i7)));
    assign f16    = (((~i4) | (~f15) | i8 | (~i9)) & (i3 | f16 | (~i9)));
    assign f15    = (((~f13) | (~i9)) & ((~i5) | f15 | (~i9)) & (f15 | i8 | (~i9)));
    assign o14    = ((~f19) & i4 & (~i5) & (~f16));
    assign f13    = ((~i2) & (~f19) & (~i4) & i9);
always @(posedge clk) begin
    rf12_reg    <= (~rf12);
end
    assign rf12 = (~(OE_n)) ? rf12_reg : 'bZ;
endmodule // GAL16V8A_U14

edit: Nice work @Melkhior

Now considering having a got at the NuBusFPGA, so interested in NuBus. I don't have a IIsi so understanding what's needed for a '030 bus -> NuBus adapter is purely intellectual curiosity at this stage

Like I said in the Macintosh II Sadness thread, have a look at Apple's NuBus primer:

| NuBus Adapter/FPU | TwinSlot PDS Adapter | Isi Logic Board |

NuBus Slot $9/FPU -> top PDS Slot -> Bottom PDS = Improved/Rearranged IIci Application Specific Cache Slot -> IIsi Logic Board

NuBus Adapter in Top Slot is connected to Bottom Slot on TwinSlot adapter PCB used in blockish TXT diagram for "clarity" LOL!
IIci down two NuBus Slots and IIsi down Audio IN subsystem, but machine state = IIci ROM boot? = IIxi

Meanwhile, I located the SuperIIsi™ project box. Promised pic:

I've since learned that what I thought were noise reducing Zener Diodes should be labeled Resistor Packs (for bus termination?) on the SuperMac VidCard adapter. My adapters don't have packs installed, but I've seen pictures of same where they were installed. Those were orange as depicted, is there a color coding standard for SIP components.

Hey Trash,
Thought you might find this interesting - a IIsi nubus adapter made by radius (not apple), with FPU unpopulated. Perhaps this is a path to nubus on SE/30?