68kMLA Classic Interface

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Anyone up for some IIcx troubleshooting assistance? We have clocks but no activity...
Posted by: Sideburn on 2023-07-03 14:05:22 Heres a Macintosh Portable i just fixed... Cleaned, re-capped, Hybrid board replaced, broken trace fixes and UV solder masked.. Much better hot air gun management (didn't even melt any plastic connectors or buttons) 🙂
Posted by: GRudolf94 on 2023-07-03 14:05:52 The reset trigger signal is fed into pin 7 of UB15 and UA15, and each generates one reset signal on pin 6 (/RST_A and /RST_B or somesuch). Have you checked that both see a reset button pulse or a signal coming up to 5V on pin 7? Only then should anything happen on pin 6 of either. Also consider the weird pin numbering on PLCC packages. Another thing: the sony sound ICs need 12V to work. Check if that's present there.
Posted by: GRudolf94 on 2023-07-03 14:06:40 The reset trigger signal is fed into pin 7 of UB15 and UA15, and each generates one reset signal on pin 6 (/RST_A and /RST_B) Just checked, Bomarc calls them ARST and BRST but meh.
Posted by: Sideburn on 2023-07-03 14:09:21 Just checked, Bomarc calls them ARST and BRST but meh. Yes... Im using the same schematic
Posted by: GRudolf94 on 2023-07-03 14:10:41 Bear in mind those tend to contain mistakes. Better than nothing sometimes, but shouldn't be taken as gospel.
Posted by: Sideburn on 2023-07-03 14:18:59 The reset trigger signal is fed into pin 7 of UB15 and UA15, and each generates one reset signal on pin 6 (/RST_A and /RST_B or somesuch). Have you checked that both see a reset button pulse or a signal coming up to 5V on pin 7? Only then should anything happen on pin 6 of either. Also consider the weird pin numbering on PLCC packages. Another thing: the sony sound ICs need 12V to work. Check if that's present there. ok pin 7 is going from 4.7 to 3.8 when i hit reset. ARST is now dropping from 4.7 to 0 when i hit reset (checked pin 13 of the 68882 / UC8) pin 6 of UA15 is going low and high when i hit reset and it seems to be timed by 25ms or so.... i can hit the button quick and pin 6 has to "catch up".. pin 6 of UB15 is doing the same i hit reset and then watch it go low and high... pin 12 of UA15 and UB15 have 12v.
Posted by: Sideburn on 2023-07-03 14:20:44 Bear in mind those tend to contain mistakes. Better than nothing sometimes, but shouldn't be taken as gospel. ive noticed... its saying pin 15 of UA15 is going to R17 (the bodge i had to make) but it is going to R7
Posted by: Sideburn on 2023-07-03 14:28:56 When I hit reset, ARST goes low on the 68030, and the address lines (A2,3,4, etc go high and then low.
Posted by: GRudolf94 on 2023-07-03 14:32:57 Ok, so you have reset and a machine that starts to execute. I would look at the status lines on the 030 - the first thing the ROM does after it's done with initial startup is, as @Phipli mentioned before, use the VIA to remap itself. Check if that happens.
Posted by: Sideburn on 2023-07-03 14:35:36 Ok, so you have reset and a machine that starts to execute. I would look at the status lines on the 030 - the first thing the ROM does after it's done with initial startup is, as @Phipli mentioned before, use the VIA to remap itself. Check if that happens. OK I need some help here. looking at the schematics I dont see which lines are STATUS do you mean STATUS on J12 of the 030? J12 is sitting low when i hit reset. I did a single shot capture on the o'scope and nothing.
Posted by: Phipli on 2023-07-03 14:42:10 OK I need some help here. looking at the schematics I dont see which lines are STATUS do you mean STATUS on J12 of the 030? J12 is sitting low when i hit reset. I did a single shot capture on the o'scope and nothing. You want bit 4 of port A I think this means. So, if port A is labelled from 0 to 7, thats PA4. Can you share the picture of VIA1 from your schematic?
Posted by: Sideburn on 2023-07-03 14:49:50 View attachment 58864 You want bit 4 of port A I think this means. So, if port A is labelled from 0 to 7, thats PA4. Can you share the picture of VIA1 from your schematic? Pics and pdf attached
Posted by: Phipli on 2023-07-03 14:54:15 Pics and pdf attached Pin 6 according to that. Does it change state after you press the reset button?
Posted by: GRudolf94 on 2023-07-03 14:56:00 @Sideburn by status lines I mean the controls signals that tell us what the CPU is doing. Such as R/W, !DTACK and others, not the literal status signal. Sorry for the confusion. Also check /BERR and... Maybe /HALT?
Posted by: Sideburn on 2023-07-03 14:58:36 @Sideburn by status lines I mean the controls signals that tell us what the CPU is doing. Such as R/W, !DTACK and others, not the literal status signal. Sorry for the confusion. Also check /BERR and... Maybe /HALT? Ahh, yes i checked all those already.. Pin 6 according to that. Does it change state after you press the reset button? Stuck high and no change after reset.. most pins on that chip are the same.. stuck high, some low but no change on reset.
Posted by: GRudolf94 on 2023-07-03 15:01:48 Ahh, yes i checked all those already.. Stuck high and no change after reset.. most pins on that chip are the same.. stuck high, some low but no change on reset. I mean, just in case they were doing something different now, heh. One important thing when debugging m68k machines is knowing what those mean, and when they should be active. If /BERR is always asserted, that means there's always a bus error, so we look there. If /DTACK is never asserted, we know that no transaction is being acknowledged as successfully completed (at least in macs - some machines ground DTACK), etc.
Posted by: Sideburn on 2023-07-03 15:03:55 @Sideburn by status lines I mean the controls signals that tell us what the CPU is doing. Such as R/W, !DTACK and others, not the literal status signal. Sorry for the confusion. Also check /BERR and... Maybe /HALT? Ahhh yes i had already checked those but I just re-checked them now that I have the sound chips in and they all are stuck high and no change on reset (R/W, DS, AS, BERR, DSACK)
Posted by: GRudolf94 on 2023-07-03 15:05:11 Looking back at the start of the thread, you said the CPU doesn't get warm. What do you have for 5V at the CPU, and what for a clock?
Posted by: Phipli on 2023-07-03 15:06:42 Stuck high and no change after reset.. most pins on that chip are the same.. stuck high, some low but no change on reset. Thats good, the VIA is telling the GLU to overlay the ROM. It should go to pin 49 of the GLU chip. Does that have continuity to the top of the pin?
Posted by: Phipli on 2023-07-03 15:07:29 Looking back at the start of the thread, you said the CPU doesn't get warm. What do you have for 5V at the CPU, and what for a clock? Good point. Got distracted by the lack of sound chips.
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