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PowerLogix UltraCache 1MB UC1MB
Posted by: trag on 2019-11-15 13:43:39
I haven't found a datasheet specifically for that B36-7 yet, but I did find a note that Cypress bought Galvantech and the GVY71128B36T-7 changed to CY7C1345A1-117AC.

The closest current Cypress part I could find uses that same pinout supporting that it is a standard.

View attachment PCN010021 - Galvantech Part Marking Change for Cypress Marking .pdf

View attachment CY7C1345G.pdf
Posted by: jessenator on 2019-11-15 13:50:56
View attachment 30172
looks like that uploaded as a 0 byte file. Here's another.

View attachment CY7C1345G-farnell.pdf
Posted by: jessenator on 2019-11-15 16:21:19
Right now I'm mainly curious whether there are any components on the DIMM besides the SRAM chips.    Ignoring resistors and caps, of course.
Here's side A: https://www.dropbox.com/sh/b0htt7cndolqywa/AACmfGGbtGxQ1gmJWpYiRLBXa?dl=0

Here's side B: https://www.dropbox.com/sh/lb9bheme7a0cns4/AAA-xySf03qlM7hie8N_hXjna?dl=0

I couldn't get the auto panorama to work on these... so hopefully you can glean something from them. if you need a better light on that center IC let me know.
Posted by: MOS8_030 on 2019-11-15 20:18:59
Since I (apparently) see that solder bridge on both chips I would assume it's supposed to be there.
Posted by: Trash80toHP_Mini on 2019-11-16 08:55:13
It's also a little odd that they used X36 parts.   I don't think there's any parity support on those Macs.
Given the microcontroller mentioned below, could parity checking be implemented on DIMM for whatever reason?

The PowerBoost Pro included a little microcontroller on board that adjusts those CPU card speed setting pins (CLKID_0-2) as one adjusts the bus speed, so that the CLKID pins are always set approrpriately for the chosen bus speed.    The lack of this adjustment on most upgrade cards is probably why most of them won't adjust far off of 45MHz.
If not parity checking per se, might parity checking indicate how the memory is implemented on the eight pads?

I would be interested in seeing a complete scan of the cache.  Apparently, I have forty-eight of the D32-5Is in the attic.   It might be possible to manufacture copies.
Given eight pads, might PowerLogix have been planning 2MB, 4MB and 8MB versions of the UltraCache? They'd certainly not have mentioned that in the press release for PowerCache 1MB. Simpler explanation would be availability of memory capacities/prices at any given time during production, but cache good, more cache better?

Can't see the labeling of the centered ICs. ROM and microcontroller?
Posted by: jessenator on 2019-11-16 09:11:56
Can't see the labeling of the centered ICs. ROM and microcontroller? 
I'll get a better shot of just that one.
Posted by: jessenator on 2019-11-16 16:47:24
@Trash80toHP_Mini

thank you, barrel extension:


It's still tricky because it's etched, not printed, and not very deep...
Posted by: Trash80toHP_Mini on 2019-11-16 19:54:13
Nice, is that on the solder or component side. Got one of the IC on the opposite side?
Posted by: jessenator on 2019-11-16 19:58:15
Nice, is that on the solder or component side. Got one of the IC on the opposite side?
It's the same IC on both sides. FYI, the images in that dropbox folder are the original 16MP that haven't been downsampled.
Posted by: Trash80toHP_Mini on 2019-11-16 20:14:15
Interesting, trag had mentioned a microprocessor being on board? THX.
Posted by: trag on 2019-11-18 11:38:34
Interesting, trag had mentioned a microprocessor being on board? THX.


On the PowerBoost Pro, which is a CPU card, not a cache card.   The PowerBoost Pro is a PPC604e based CPU card with a microcontroller helping with some of the clock adjustment tasks.

I haven't looked up the extra chip on the Ultracache, but it is almost certainly a Tag RAM to complement the static RAM.   That component could be hard to come by...    Nobody seems to manufacture discreet tag RAMs any more.    You can make one out of fast comparators, another SRAM and a little logic....
Posted by: jessenator on 2019-11-18 11:51:21
N341256SJ-12 datasheet

View attachment N341256SJ-12.pdf
Posted by: trag on 2019-11-18 16:07:04
N341256SJ-12 datasheet

View attachment 30200


Interesting.   It's just a plain old 32K X 8 SRAM.   No Tag function.  I guess the comparators are on the PPC or built into the memory controller.    It's a fast SRAM, so the 32K X 8 parts I have on  hand at 55ns, wouldn't do the trick.  Sigh.

Huh.  I may have typed to soon.   Looks like I have 457 MCM6206B in the attic.   However, only the fastest speed rating would replace the N341256SJ-12.   Unfortunately, I didn't note down the speed rating in my inventory.  Chances of them being 12ns are pretty low.

Also, still having the same puzzlement I had in this posting:





Near the end of that post, I note that a PCI PowerMacintosh cache module that I examined contains 32K words of cache storage, but only 8K of Tag RAM.   The number of address bits in both should probably match, unless the cache scheme is always storing 4 words at a time.

Happily, your Ultracache also has 4 times as many storage addresses as Tag addresses (32K vs. 128K) so at least there's consistency.

jt, I imagine the extra chip positions on the module are there so that the module could be built from lower density parts.   The example Jessenator has uses two 128K chips.    But they might have built the same module with eight 32K chips.

The fact that there's only room for one set and size of TAG chips suggests that the cache capacity will always be the same on this module, but the same capacity might be built out of varying numbers of different capacity chips.
Posted by: Trash80toHP_Mini on 2019-11-18 22:44:44
Yep, that was the simpler explanation I mentioned: use whatever combination of the least expensive memory you can source for those pads at any point while the board is in production. Oh well! :mellow:

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